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71608 ms pc 20080625-s00005 no.a1257-1/18 http://onsemi.com semiconductor components industries, llc, 2013 may, 2013 lv3313pm overview the lv3313pm is an electronic volume ic that implements a rich set of audio control functions including input selection switching function, an input gain, volume, loudness, balance, fader, and bass/treble control. features ? zero-cross switching circuits (input gain control block and volume control block) can switch signal detection location automatically. ? zero-cross switching circuits (input gain control block and volume control block) and soft mute circuits used for low noise even when input signals are present. ? low power consumption due to the use of bimos process. ? all functions are controlled using serial data (ccb). functions ? input selector : four input signals can be selected (three single-ended inputs and one differential input). ? input gain control : the input signal can be amplified by 0db to +18db (1db steps). ? loudness control : taps are output starting at the -32db position of the ladder resistor and a loudness function implemented with external capacitor and resistor components. ? volume control : +10db to -79db/- ? (1db steps) l/r independent control. ? bass control : +12db to -12db in 2db steps ? treble control : +12db to -12db in 2db steps ? fader control : the fader volume can be attenuations by one of 16 levels . independent control each four channels. (a total of 16 settings with attenuations of 0db to -2db in 1db steps, -2db to -20db in 2db steps, and -30db, -45db, - 60db and - ? db settings.) ? mute orderin g numbe r : ena1257 bi-cmos lsi electronic volume ic for car audio systems ordering number : ena1257 ? ccb is on semiconductor? ?s original format. all addresses are managed by on semiconductor? for this format. ? ccb is a registered trademark of semiconductor components industries, llc.
lv3313pm no.a1257-2/18 specifications absolute maximum ratings at ta = 25 ? c, v ss = 0v parameter symbol conditions ratings unit maximum supply voltage v dd max v dd 9.5 v maximum input voltage v in max all input pins v ss -0.3 to v dd v allowable power dissipation pd max ta ? 85 ? c, when mounted on a printed circuit board * 600 mw operating temperature topr -40 to +85 ? c storage temperature tstg -50 to +125 ? c * specified circuit board : 114.3 ? 76.1 ? 1.6mm 3 : glass epoxy board allowable operating ratings at ta = 25 ? c, v ss = 0v parameter symbol conditions ratings unit min typ max supply voltage v dd v dd 7.0 8.0 9.0 v high-level input voltage v ih cl, di, ce 3.0 5.5 v low-level input voltage v il cl, di, ce v ss 1.0 v input voltage amplitude v in v ss v dd vp-p input pulse width t ? w cl 1 ? s setup time tsetup cl, di, ce 1 ? s hold time thold cl, di, ce 1 ? s operating frequency fopg cl 500 khz rising time tr cl, di, ce 0.1/fopg s falling time tf electrical characteristics at ta = 25c, v dd = 8v, v ss = 0v parameter symbol conditions ratings unit min typ max input block input resistance rin l1-l3, r1-r3 35 50 65 k ? minimum input gain gin min l1-l3, r1-r3 -1.0 0 +1.0 db maximum input gain gi max +17 +18 +19 db inter-step setting error aterr -1.0 +1.0 db left/right balance bal -0.5 +0.5 db volume block input resistance rvr lvrin, rvrin 35 50 65 k ? inter-step setting error aterr +10db to -40db -0.5 +0.5 db left/right balance bal -0.5 +0.5 db bass block bass control range gb max max. boost/cut ? 10 ? 12 ? 14 db inter-step setting error aterr -10db to +10db -0.5 +0.5 db left/right balance bal -0.5 +0.5 db treble block treble control range gb max max. boost/cut ? 10 ? 12 ? 14 db inter-step setting error aterr -10db to +10db -0.5 +0.5 db left/right balance bal -0.5 +0.5 db fader block input resistance rfed 35 50 65 k ? inter-step setting error aterr 0db to -2db -0.5 +0.5 db -4db to -20db -1.0 +1.0 db -30db -2.0 +2.0 db -45db -3.0 +3.0 db left/right balance bal 0db to -30db -0.5 +0.5 db stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
lv3313pm no.a1257-3/18 overall characteristics at ta = 25c, v dd = 8v, v ss = 0v parameter symbol conditions ratings unit min typ max a loss of insertion att -1.0 +1.0 db total harmonic distortion thd v in = 1vrms, f = 1khz 0.004 0.01 % inter-input crosstalk ct v in = 1vrms, f = 1khz 80 88 db left/right channel crosstalk ct v in = 1vrms, f = 1khz 80 88 db maximum attenuation v o min v in = 1vrms, f = 1khz 80 88 db output noise voltage vn 10 25 ? v current drain i dd 16 23 ma input high-level current i ih cl, di, ce, v in = 5.5v 10 ? a input low-level current i il cl, di, ce, v in = 0v -10 ? a maximum input voltage vcl thd = 1% rl = 10k ? all controls flat, f in = 1khz 2.2 vrms common-mode rejection ratio cmrr v in = 1vrms, f = 1khz 50 db package dimensions unit : mm (typ) 3148a 10.0 13.2 10.0 13.2 0.2 1.0 (2.5) 2.8max 0.1 0.35 0.8 (1.0) 1 44 sanyo : qip44m(10x10)
lv3313pm no.a1257-4/18 pin assignment 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 44 43 42 41 40 39 38 37 36 35 34 12 13 14 15 16 17 18 19 20 21 22 lfout lrout av ss ce di cl osc vreg dv ss rrout rfout l3 l2 l1 v dd mute test ph vref r1 r2 r3 r4m r4p rselo rvrin rct rf3c1 rf1c1 rf1c2 rf1c3 rvrout rfin l4m l4p lsel0 lvrin lct lf3c1 lf1c1 lf1c2 lf1c3 lvrout lfin lv3313pm top view
lv3313pm no.a1257-5/18 block diagram control circuit logic circuit osc volume fader volume fader volume fader volume fader volume input gain input gain input selector diff input select diff input select bias voltage circuit lvref rvref l4m l4p lselo lvrin lct r4m r4p rselo rvrin rct lvrout lfin pa ccb interface com av ss mute 2band eq volume zero cross det lfout soft mute soft mute pa rfout ce di cl + + + + + + + pa rrout + + l3 + l2 + l1 v dd + + + input selector 34 22 23 lf1c3 25 24 29 30 lf1c1 27 lf3c1 lf1c2 26 31 32 33 pa lrout + 21 19 20 dv ss 14 vreg osc 15 16 18 17 13 12 35 36 r1 + r2 + r3 + 42 vref + 41 ph + 40 43 44 1 2 37 38 test 39 mute circuit zero cross det 28 rvrout rfin 2band eq + 11 rf1c3 9 10 rf1c1 7 rf3c1 rf1c2 8 6 5 4 3
lv3313pm no.a1257-6/18 application circuit 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 44 43 42 41 40 39 38 37 36 34 35 r3 r2 r1 vref ph test mute v dd l1 l3 l2 rfout rrout dv ss vreg osc cl di ce av ss lfout lrout lfin lvrout lf1c3 lf1c2 lf1c1 lf3c1 lct lvrin lselo l4m l4p rfin rvrout rf1c3 rf1c2 rf1c1 rf3c1 rct rvrin rselo r4m r4p 12 13 14 15 16 17 18 19 20 21 22 1 f 68k 4.7k 0.1 f 10 f 10 f 220pf 2700pf 1 f 1 f 1 f 1 f com pa + + + + + 10 f + + 1 f + 1 f + 1 f + 1 f 1 f + 1 f + 1 f + 1 f + 22 f + 0.47 f + pa + 10 f 10 f pa + pa + 10 f 0.1 f 0.1 f 0.1 f 0.1 f + 1 f 68k 4.7k 0.1 f 220pf 2700pf +
lv3313pm no.a1257-7/18 control system timing and data format the lv3313pm is controlled by applying the stipulated data to the cl, di and ce pins. the data consists of a total of 104 bits, of which 8 bits are the device address, 96 bits are the control data. send to data address code b0 b1 b2 b3 a0 a1 a2 a3 1 0 0 0 0 0 0 1 ce di d93 d92 d91 d90 d5 d4 d3 d2 d1 a3 a2 a1 a0 b3 b2 b1 b0 cl 1 s min 1 s min 1 s min 1 s 1 s t dest min data ce di cl d94 d0 d95 tf tr ce di cl tr 1 s min tr, tf address code data setting (96bit) b0 to b3, a0 to a3 d0 to d95
lv3313pm no.a1257-8/18 data setting input switching control d0 d1 d2 operation 0 0 0 init 1 0 0 l1 (r1) 0 1 0 l2 (r2) 1 1 0 l3 (r3) 0 0 1 l4 (r4) input gain control d3 d4 d5 d6 d7 lch d8 d9 d10 d11 d12 rch 0 0 0 0 0 0db 1 0 0 0 0 +1db 0 1 0 0 0 +2db 1 1 0 0 0 +3db 0 0 1 0 0 +4db 1 0 1 0 0 +5db 0 1 1 0 0 +6db 1 1 1 0 0 +7db 0 0 0 1 0 +8db 1 0 0 1 0 +9db 0 1 0 1 0 +10db 1 1 0 1 0 +11db 0 0 1 1 0 +12db 1 0 1 1 0 +13db 0 1 1 1 0 +14db 1 1 1 1 0 +15db 0 0 0 0 1 +16db 1 0 0 0 1 +17db 0 1 0 0 1 +18db
lv3313pm no.a1257-9/18 volume control (10db to -43db) d13 d14 d15 d16 d 17 d18 d19 d20 lch d21 d22 d23 d24 d 25 d26 d27 d28 rch 0 1 1 0 1 1 1 0 10db 1 1 1 0 1 1 1 0 9db 0 0 0 1 1 1 1 0 8db 1 0 0 1 1 1 1 0 7db 0 1 0 1 1 1 1 0 6db 1 1 0 1 1 1 1 0 5db 0 0 1 1 1 1 1 0 4db 1 0 1 1 1 1 1 0 3db 0 1 1 1 1 1 1 0 2db 1 1 1 1 1 1 1 0 1db 0 0 0 0 0 0 0 0 0db 1 0 0 0 0 0 0 0 -1db 0 1 0 0 0 0 0 0 -2db 1 1 0 0 0 0 0 0 -3db 0 0 1 0 0 0 0 0 -4db 1 0 1 0 0 0 0 0 -5db 0 1 1 0 0 0 0 0 -6db 1 1 1 0 0 0 0 0 -7db 0 0 0 1 0 0 0 0 -8db 1 0 0 1 0 0 0 0 -9db 0 1 0 1 0 0 0 0 -10db 1 1 0 1 0 0 0 0 -11db 0 0 1 1 0 0 0 0 -12db 1 0 1 1 0 0 0 0 -13db 0 1 1 1 0 0 0 0 -14db 1 1 1 1 0 0 0 0 -15db 0 0 0 0 1 0 0 0 -16db 1 0 0 0 1 0 0 0 -17db 0 1 0 0 1 0 0 0 -18db 1 1 0 0 1 0 0 0 -19db 0 0 1 0 1 0 0 0 -20db 1 0 1 0 1 0 0 0 -21db 0 1 1 0 1 0 0 0 -22db 1 1 1 0 1 0 0 0 -23db 0 0 0 1 1 0 0 0 -24db 1 0 0 1 1 0 0 0 -25db 0 1 0 1 1 0 0 0 -26db 1 1 0 1 1 0 0 0 -27db 0 0 1 1 1 0 0 0 -28db 1 0 1 1 1 0 0 0 -29db 0 1 1 1 1 0 0 0 -30db 1 1 1 1 1 0 0 0 -31db 0 0 0 0 0 1 0 0 -32db 1 0 0 0 0 1 0 0 -33db 0 1 0 0 0 1 0 0 -34db 1 1 0 0 0 1 0 0 -35db 0 0 1 0 0 1 0 0 -36db 1 0 1 0 0 1 0 0 -37db 0 1 1 0 0 1 0 0 -38db 1 1 1 0 0 1 0 0 -39db 0 0 0 1 0 1 0 0 -40db 1 0 0 1 0 1 0 0 -41db 0 1 0 1 0 1 0 0 -42db 1 1 0 1 0 1 0 0 -43db
lv3313pm no.a1257-10/18 volume control (-44db to - ? ) d13 d14 d15 d16 d 17 d18 d19 d20 lch d21 d22 d23 d24 d 25 d26 d27 d28 rch 0 0 1 1 0 1 0 0 -44db 1 0 1 1 0 1 0 0 -45db 0 1 1 1 0 1 0 0 -46db 1 1 1 1 0 1 0 0 -47db 0 0 0 0 1 1 0 0 -48db 1 0 0 0 1 1 0 0 -49db 0 1 0 0 1 1 0 0 -50db 1 1 0 0 1 1 0 0 -51db 0 0 1 0 1 1 0 0 -52db 1 0 1 0 1 1 0 0 -53db 0 1 1 0 1 1 0 0 -54db 1 1 1 0 1 1 0 0 -55db 0 0 0 1 1 1 0 0 -56db 1 0 0 1 1 1 0 0 -57db 0 1 0 1 1 1 0 0 -58db 1 1 0 1 1 1 0 0 -59db 0 0 1 1 1 1 0 0 -60db 1 0 1 1 1 1 0 0 -61db 0 1 1 1 1 1 0 0 -62db 1 1 1 1 1 1 0 0 -63db 0 0 0 0 0 0 1 0 -64db 1 0 0 0 0 0 1 0 -65db 0 1 0 0 0 0 1 0 -66db 1 1 0 0 0 0 1 0 -67db 0 0 1 0 0 0 1 0 -68db 1 0 1 0 0 0 1 0 -69db 0 1 1 0 0 0 1 0 -70db 1 1 1 0 0 0 1 0 -71db 0 0 0 1 0 0 1 0 -72db 1 0 0 1 0 0 1 0 -73db 0 1 0 1 0 0 1 0 -74db 1 1 0 1 0 0 1 0 -75db 0 0 1 1 0 0 1 0 -76db 1 0 1 1 0 0 1 0 -77db 0 1 1 1 0 0 1 0 -78db 1 1 1 1 0 0 1 0 -79db 0 0 0 0 1 0 1 0 - ?
lv3313pm no.a1257-11/18 tone block treble gain d29 d30 d31 d32 lch d33 d34 d35 d36 rch 0 1 1 1 +12db 1 0 1 1 +10db 0 0 1 1 +8db 1 1 0 1 +6db 0 1 0 1 +4db 1 0 0 1 +2db 0 0 0 0 0db 1 0 0 0 -2db 0 1 0 0 -4db 1 1 0 0 -6db 0 0 1 0 -8db 1 0 1 0 -10db 0 1 1 0 -12db bass gain d37 d38 d39 d40 lch d41 d42 d43 d44 rch 0 1 1 1 +12db 1 0 1 1 +10db 0 0 1 1 +8db 1 1 0 1 +6db 0 1 0 1 +4db 1 0 0 1 +2db 0 0 0 0 0db 1 0 0 0 -2db 0 1 0 0 -4db 1 1 0 0 -6db 0 0 1 0 -8db 1 0 1 0 -10db 0 1 1 0 -12db
lv3313pm no.a1257-12/18 fader block d45 d46 d47 d48 d49 d50 lfout d51 d52 d53 d54 d55 d56 lrout d57 d58 d59 d60 d61 d62 rfout d63 d64 d65 d66 d67 d68 rrout 0 0 0 0 0 0 0db 1 0 0 0 0 0 -1db 0 1 0 0 0 0 -2db 1 1 0 0 0 0 -4db 0 0 1 0 0 0 -6db 1 0 1 0 0 0 -8db 0 1 1 0 0 0 -10db 1 1 1 0 0 0 -12db 0 0 0 1 0 0 -14db 1 0 0 1 0 0 -16db 0 1 0 1 0 0 -18db 1 1 0 1 0 0 -20db 0 0 1 1 0 0 -30db 1 0 1 1 0 0 -45db 0 1 1 1 0 0 -60db 1 1 1 1 0 0 - ? loudness control d69 operation 0 off 1 on zero cross control d70 operation 0 off 1 on zero cross signal detection block control d71 operation 0 input gain 1 volume d72 operation 0 manual detection 1 automatic detection d73 d74 0 0 zero-cross signal detection timer overflow settings d75 d76 operation 0 0 timer time 10ms 1 0 timer time 20ms 0 1 timer time 40ms 1 1 timer time 80ms
lv3313pm no.a1257-13/18 soft mute control d77 operation 0 soft mute mode off 1 soft mute mode on d78 operation 0 mute set off 1 mute set on d79 d80 operation 0 0 normal mode 1 0 test mode soft mute settling time select control d81 d82 operation 0 0 mute time 0.64ms 1 0 mute time 5.12ms 0 1 mute time 40ms 1 1 mute time 80ms d83 d84 d85 d86 d87 0 0 0 0 0 test mode block d88 d89 d90 d91 d92 d93 d94 d95 0 0 0 0 0 0 0 0
lv3313pm no.a1257-14/18 pin functions pin no. pin name function equivalent circuit 36 35 34 42 43 44 l1 l2 l3 r1 r2 r3 single end input pins. v dd lvref rvref + - 33 32 1 2 l4m l4p r4m r4p differential input pins. m p v dd lvref rvref + - v dd 31 3 lselo rselo input selector output pins. v dd + - 30 4 lvrin rvrin main volume input pins. v dd lvref rvref + - 29 5 lct rct loudness function pins. v dd 24 10 lvrout rvrout tone output pins. v dd + - 23 11 lfin rfin fader block input pins. drive at low impedance. v dd 22 21 12 13 lfout lrout rfout rrout fader output pins.attenuation is possible separately for the front end and rear end. v dd + - continued on next page.
lv3313pm no.a1257-15/18 continued from preceding page. pin no. pin name function equivalent circuit 41 vref connect a capacitor of a few tens of uf between vref and av ss (v ss ) as a 0.55 ? v dd voltage generator, current ripple countermeasure. v dd + - lvref rvref 15 vreg internal logic voltage pin. v dd + - 37 v dd power supply pin. 20 av ss ground pin. 38 mute external muting control pin. setting this pin to v ss level sets forcibly fader volume block to - ? level. v dd 27 26 25 7 8 9 lf1c1 lf1c2 lf1c3 rf1c1 rf1c2 rf1c3 capacitor connection pins for configuring equalizer bass band filter. connect a capacitor between lf1c1 (rf1c1) and lf1c2 (rf1c2), and between lf1c2 (rf1c2) and lf1c3 (rf1c3). f1c1 v dd v dd + - f1c2 v dd vref f1c3 v dd 28 6 lf3c1 rf3c1 capacitor connection pins for configuring equalizer treble band filter. connect a high band compensation capacitor between lf3c1 (rf3c1) and v ss . f3c1 v dd 17 18 cl di input pin for serial data and clock used for control. v dd 19 ce chip enable pin.data is written to the internal latch and the analog switches are operated when the level changes from high to low. data transfer is enabled when the level is high. continued on next page.
lv3313pm no.a1257-16/18 continued from preceding page. pin no. pin name function equivalent circuit 39 test ic test pin. normally this pin is open. 14 dv ss logic system ground pin. 16 osc external oscillat input pin. normally this pin is open. v dd 40 ph automatic zero cross detection pin. v dd
lv3313pm no.a1257-17/18 usage cautions (1) data transmission at power on ? the status of internal analog switches is unstable at power on. therefore, perform muting or some other countermeasure until the data has been set. ? at power on, initial setting data must be sent once in order to stabilize the bias of each block in a short time. (2) description of zero cros s switching circuit operation the lv3313pm have a function to switch zero cross comparator signal detection locations, enabling the selection of the optimum detection location for blocks whose data is to be updated.basically, the switching noise can be minimized by inputting the signal immediately following the block whose data is to be updated to the zero cross comparator, so it is necessary to sw itch the detection location every time. lv3313pm zero cross detection circuit (3) zero cross switching control method the zero cross switching control method c onsists of setting the zero cross control bits to the zero cross detection mode, and specifying the detection blocks before transmitting the data. these control bits are latched immediately following data transfer, that is to say beforehand in sync with the fa lling edge of ce, so when updating data of volumes, etc., it is possible to perform mode setting and zero cross switching with one data transfer. (4) soft mute operation the lv3313pm have a soft mute function for low switchi ng noise, when this mute function set operation. (mute/unmute function select) the soft mute time can be selected by send to ccb control. (0.6ms, 5ms, 40ms, 80ms) a soft mute function can be implemented by set to soft mute on. (set to mute on/off) input gain zero cross comparator switch volume soft mute time soft mute time
lv3313pm ps no.a1257-18/18 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

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